CEA-Leti is one of the worlds top five semiconductor research technology organisations (RTOs), non-profit organisations that serve as intermediaries between research institutes and industrial players. RTOs work closely with pure research institutes to identify promising innovations, and they work closely with industrial partners to develop prototypes and demonstrators that prepare those innovations for mass production.
RTOs also cooperate with a wide array of public actors to help develop strategies for technological development within a given country. In Europe, there are two other RTOs in the worlds top five: Imec in Belgium, and Fraunhofer in Germany. There are several other smaller ones in Europe, including VTT in Finland and Tecnalia in Spain.
CEA-Leti is part of a bigger organisation CEA, the French Commission for Alternative Energies and Atomic Energy, said Jean-Ren Lquepeys, deputy director and CTO at CEA-Leti. We are an applied research laboratory, making the link with fundamental research. We collaborate closely with the fundamental research division within CEA, as well as with other research institutes outside of CEA, to explore novel paths for research. We take pure research and transfer it to industry in good condition.
We have a very strong partnership with STMicroelectronics for a variety of projects. Two other strong partnerships are with Soitec for materials, and with Lynred for cooled and uncooled infrared detectors. These three partners are in the Grenoble area. We also work with a variety of large companies including Intel, Schneider, Siemens, Valeo, Renault and some of the GAFAM companies [Google (Alphabet), Apple, Facebook (Meta), Amazon, Microsoft], with whom we have confidential partnerships. And, of course, we support our startup companies 74 startups have spun out of CEA-Leti so far.
Lquepeys added: While not as known to the general public as Silicon Valley, Grenoble has been a hotspot for microelectronics and More-than-Moore technologies for quite a long time.
CEA-Leti works with companies spread across the threevalleys around Grenoble. One valley is a hotbed for microelectronics, another is home to innovation in imagery systems, and the third valley is dedicated to display technologies.
Here are Lquepeys answers to questions from Computer Weekly:
Can you provide an example of how RTOs work with industry?
Lquepeys: A good example of the role RTOs play is the way in which CEA-Leti developed fully depleted silicon on insulator (FD-SOI) technology and transferred it to Samsung, STMicroelectronics and GlobalFoundries for production.
FD-SOI uses an ultra-thin layer of insulator that sits on top of the base silicon. The transistor channel is a silicon layer that is very thin and therefore requires no doping hence the term fully depleted. FD-SOI offers a good compromise between pure computing power and reduction of power consumption 40% less then with traditional approaches. It works very well as a building block for analog and radio frequency applications.
Another advantage of FD-SOI is that we have the capability to have a back bias to put a gate below the transistor. The voltage threshold of the transistors can be shifted by applying voltage to the gate.
This makes it possible to boost the performance of the transistors when needed. You can still take the transistors down to 0.4V when you dont need huge power computing, and when you want to optimise the power consumption.
So this is a technology that offers a very good trade-off between power, energy consumption and cost. It is simpler than FinFET technology in terms of number of lithography steps required.FinFET is better for pure computing and for density and is well adapted to big CPUs or big GPUs, but not well adapted to analog and RF chips.
One example of the increasing use of FD-SOI is that Qualcomm, Mediatek and GlobalFoundries began building radio frequency (RF) front-end solutions for 5G phones, based on FD-SOI technology.
Can you give a few examples of hot areas of applied research at CEA-Leti?
Lquepeys: The first is the chiplet approach. Instead of designing a very large circuit in a single node, we design a modular architecture based on smaller chips. By doing that,we obtain several big advantages.
The first is in cost. The yield of the circuit decreases with the size. This offers performance gains because you can choose the best technology node for a given function. For example, we used a very advanced node for processor functions, and a more relaxed node for the analog and the radio frequency functions. We gain in flexibility by using a highly programmable circuit, or FPGA [field programmable gate array] in the chiplets.
Chiplets can use scalable massively parallel architectures. We demonstrated the benefits of this approach by developing prototypes of chiplets twoor threeyears ago, each with 16 cores, so 96 cores in total.
The chiplets were developed using 28nm FD-SOI. The resulting prototypes had the computing power of 10 laptops, running more than 220 Giga operations per second in a very small silicon area less than 200mm2.
Thanks to this very modular approach exploiting 3D technology, the energy efficiency gain is of a factor greater than 10. For this approach to be widely used, it is necessary to develop open communications standards to ensure communication between chiplets and to have a whole library of chiplets optimised for standard functions.
A committee to introduce standardisation of communication between chiplets was launched by big US companies including Intel, which put a lot of emphasis on advanced packaging solutions, which are solutions based on chiplets.
What is another hot area of applied research you are working on?
Lquepeys: The second one is computing based on neuromorphic chips. The human brain has a very high computing efficiency for applications like recognising forms or faces. It performs these operations using only 20W. Another example is the bees brain, which does very little computing, but is still very efficient compared with integrated circuits.
Biological systems have become a source of inspiration for the semiconductor industry. We tried to mimic the behaviour of the brain, with synapses and neurons, using non-volatile memories and transistors to reach the same order of energy efficiency.
We first launched a neuromorphic chip called Spirit. It was a demonstrator, using quite old technology 130nm CMOS technology, with integrated non-volatile memories.
We had only 10 neurons and 144 synapsis on this demonstrator and the circuit consumed only 3.6 picojoules per synaptic event. Thats around eight or 10 less than the Intel demonstrator and 10 times less than the IBM demonstrator. The computational task we had this chip perform was to recognise handwritten digits.
We disclosed this chip at an IBM conference in 2019. Now we are preparing the next generation, which will be a scaled-up version of this approach. We plan to have more than 100,000 neurons on a chip and more than 75 million synapses.
This is a promising area, with a potential for huge gains in power efficiency.
Any more hot areas of applied research that CEA-Leti is involved in that you can talk about?
Lquepeys: Yes, and its a very hot topic quantum computing. There are several approaches that are already being used around the world. These are photons, superconductors, silicon technology, cold atoms and trapped ions. If we compare these against a set of objective criteria, no technology has come out as the overall winner yet.
In terms of number of entangled qubits, which is an important criterion, photons, superconductors and cold atoms are in the lead. But scaling those approaches up would be difficult in the near future.
At CEA-Leti, we have chosen to make qubits on silicon. We think this is the most promising solution in terms of being able to scale up. That is for two reasons. First, the maturity of the electronics industry means we have the equipment and processes needed to scale up. And second, the small size of the qubits built on silicon means you can put a lot of them in a small area.
A qubit on silicon is a million times smaller than qubits using superconductors and photons and that will offer the ability to put millions of qubits on a single chip. However, at the present time, this technology is lagging in terms of the number of qubits that have been put in a single computer so far.
At CEA-Leti, we have a very aggressive roadmap. We plan to have six entangled qubits by the end of this year, compatible with an industrial pilot line, based on FD-SOI. We expect to reach 100 qubits in 2024 and a quantum processor by 2030, with a complete software stack and all the adequate error-correcting codes. This is one of our very high priorities, and huge amounts of resources have been mobilised to make this happen.
We plan to launch a startup company in this area, probably at the end of this year or the beginning of next year.
For our work on quantum computing, we have forged strategic partnerships with CNRS and INRIA, two mature research centres in France. We are financially supported by the national programme launched by [French president] Emmanuel Macron and we also get funding from the European projects we coordinate.
Speaking of Europe, where do you think Europes strengths lie in microelectronics?
Lquepeys: While Europe produces only 10% of the worlds semiconductor components, it is in a strong position for circuits in the automotive market, with a 36% market share, thanks to STMicroelectronics, Infineon and NXP. Europe is also strong in Industry 4.0 and strong in wireless connectivity.
Europe is also leading the power devices market, with Infineon and STMicroelectronics, and also has strong market share in sensors, with the two world leaders, Bosch and STMicroelectronics.
Europe is also in the leading position for microcontrollers, with STMicroelectronics, Infineon and NXP and in secure devices. All of this is around smart cards and hardware security modules for payment.
We are also in the leading position for the standardisation of telecommunication systems, from 2G up to 6G systems, which is already being planned.
Why is Grenoble a good place for all this work?
Lquepeys: Grenoble is a good place for microelectronics. It is a young and dynamic city with engineering schools and a well-established university. What is important is the trio of education, research and industry working in close collaboration to develop future products. And by the way, Grenoble was elected European Green Capital for 2022.
Grenoble welcomes the World Electronic Forum [WEF] in 2022. With the strong support of CEA, CEA-Leti is working with INRIA to organise the next edition of the WEF, which will be held in Grenoble from 5-7 October 2022. The WEF is an annual global event by invitation, limited to 150 participants in total, which brings together the largest electronic and digital industrial association, as well as industrial players and policy-makers.
The 2022 edition will be focused on a proposal by CEA-Leti on sustainable digital electronics in response to multiple environmental, geopolitical and health crises, both in developed and emerging countries. It will be a good hotspot for us, and a good way to show off Grenoble in key areas for global technological innovation, both in hardware and software.
More than 25 startups, including several from CEA-Leti, will exhibit during the WEF event, and a very strong presence is expected from leading countries in the field of electronics the US, Japan, China, Korea, Taiwan. We will also have countries with ambitions in this area India, Middle East, Southeast Asian countries.
High-level officials in the European Commission have been invited to attend, including Thierry Breton, and Frances minister of industry, Bruno Le Maire, has been invited to inaugurate the event.
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